Using this form reduces the required number of operations to n multiplications and n additions. Horner’s Rule states that we can factor this and rewrite the polynomial as:į(x) =(((a nx + a n-1)x + a n-2)x + a n-3)x + … )x +a 0. Assume that we have an nth order polynomial of the following formį(x) =a nx n + a n-1x n-1 + … +a 1x + a 0.Ĭalculating with this form directly requires a total of n(n+1)/2 multiplications and n additions making this computation complexity O(n 2). Background Horner’s RuleĪs in the previous article, Horner’s Rule is used here to reduce the number of required multiplications. Also note that this design uses full precision integer arithmetic instead of the fixed point arithmetic from the first article. In most modern designs, speed and power are bigger concerns than area but serial logic may still be worth considering in special situations. In this article, we’ll look at a very different approach using serial logic instead of parallel that requires many more clock cycles, but significantly less area and a potentially higher clock rate. In a previous article, I discussed the benefits of using Horner’s Rule and fixed point logic to calculate polynomials in fewer clock cycles. Variable polynomial order and data width.
An integer polynomial implementation using serial logic.Building blocks for basic serial multiplication and addition.A comparison of the parallel and serial methods for implementing arithmetic functions.This article covers the following topics:
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